Semiconductor impedance elements find a wide variety of uses in semiconductor integrated circuits in both MOS (Metal Oxide Semiconductor) and bipolar technology. For example, U.S. Pat. No. 4,297,721, entitled "Extremely Low Current Load Device for Integrated Circuit" and issued on Oct. 27, 1981 to V. C. McKenny et al, disclosed an impedance element used as a load element in a flip-flop type of memory cell with cross-coupled MOS driver transistors. The impedance element took the form of an undoped horizontal strip portion of intrinsic (high resistance) polycrystalline silicon (polysilicon) bounded at both ends by extrinsic (doped) polysilicon strip portions for interconnecting the high resistance polysilicon strip portion both to a power supply node and to a data node of the flip-flop. Such an impedance element, however, has several disadvantages: (1) it requires an extra masking and lithographic step to define the boundaries between the intrinsic and extrinsic polysilicon portions; (2) it requires that the feature size of the mask that defines the distance between these boundaries be undesirably large, to wit, at least about 8 microns in the case of the disclosed subsequent annealing temperature of about 1100 degrees C., (corresponding to about 5 microns for an anneal of about 1000 degrees C.), lest the resulting diffusion of impurities during anneal should destroy (short out) the intrinsic region; and (3) it is not feasible to reduce the transistor gate electrode resistance, as is desirable, by depositing metal silicide over the extrinsic polysilicon portions, because of the uncertainty of the boundaries (after diffusion) of the intrinsic portions and hence because of the concomitant problem of undesirably electrically shorting out the intrinsic portions during deposition of the metal silicide.
On the other hand, Schottky barrier diodes have been taught as useful impedance elements in a flip-flop memory cell. See, for example, U.S. Pat. No. 3,585,412 issued to D. A. Hodges et al on June 15, 1971 entitled "Schottky Barrier Diodes as Impedance Elements." The Schottky diodes in that patent were disclosed as being formed by a suitable refractory metal layer in rectifying Schottky barrier contact with a localized n or p type surface zone at a major surface of an underlying semiconductive silicon body. In MOS transistor circuits, however, such diodes would require added precious semiconductor area or else would not readily provide the diode directionality desired in certain applications as, for example, in a static random access memory element having the form of a flip-flop memory cell using N-MOS (N-channel MOS) transistors.
It would therefore be desirable to have an impedance element, such as a load element, which mitigates the above-mentioned problems and which is suitable for incorporation in a flip-flop memory cell. In designing such an element, it is important to recognize the problem of poor step coverage caused by deposition of certain materials which do not deposit conformally over non-planar surfaces, especially metallization materials required for interconnecting various elements of the circuit.